快樂蝦

http://blog.csdn.net/lights_joy/

lights@hb165.com

本文適用于

ADI bf561 DSP

uclinux-2008r1.5-rc3 ( 移植到 vdsp5)

Visual DSP++ 5.0(update 5)

歡迎轉(zhuǎn)載，但請保留作者信息

/* This section keeps the processor in supervisor mode

* during kernel boot. Switches to user mode at end of boot.

* See page 3-9 of Hardware Reference manual for documentation.

*/

/* EVT15 = _real_start */

p0.l = lo(EVT15);

p0.h = hi(EVT15);

p1.l = _real_start;

p1.h = _real_start;

[p0] = p1;

csync;

p0.l = lo(IMASK);

p0.h = hi(IMASK);

p1.l = IMASK_IVG15;

p1.h = 0x0;

[p0] = p1;

csync;

raise 15;

p0.l = .LWAIT_HERE;

p0.h = .LWAIT_HERE;

reti = p0;

#if ANOMALY_05000281

nop; nop; nop;

#endif

rti;

.LWAIT_HERE:

jump .LWAIT_HERE;

ENDPROC(__start)

這段代碼設(shè)置了 EVT15 的入口，打開中斷 15 的掩碼，然后直接使用一個軟中斷，這樣在 rti 之后將跳轉(zhuǎn)到 _real_start 開始執(zhí)行。這么做的原因在 Hardware Reference manual 中說明，看看到底是么回事：

For non-OS environments, application code should remain in Supervisor mode so that it can access all core and system resources. When RESET is de-asserted, the processor initiates operation by servicing the reset event. Emulation is the only event that can pre-empt this activity. Therefore, lower priority events cannot be processed.

One way of keeping the processor in Supervisor mode and still allowing lower priority events to be processed is to set up and force the lowest priority interrupt ( IVG15 ). Events and interrupts are described further in "Events and Sequencing" on another page . After the low priority interrupt has been forced using the RAISE15 instruction, RETI can be loaded with a return address that points to user code that can execute until IVG15 is issued. After RETI has been loaded, the RTI instruction can be issued to return from the reset event.

The interrupt handler for IVG15 can be set to jump to the application code starting address. An additional RTI is not required. As a result, the processor remains in Supervisor mode because IPEND[15] remains set. At this point, the processor is servicing the lowest priority interrupt. This ensures that higher priority interrupts can be processed.

要理解這段話，先得理解 561 內(nèi)核的幾種模式及其轉(zhuǎn)換：

在 dsp 復(fù)位后，實際處于 RESET 的狀態(tài)，所執(zhí)行的第一行代碼實際是做為 reset 中斷服務(wù)例程來運行的，因此在最后使用了一個 rti 語句結(jié)束此中斷服務(wù)程序，此時將進入 user 模式，由于在 rti 之前設(shè)置了 reti 寄存器的值， pc 將進入 .LWAIT_HERE 的這個死循環(huán)。又由于之前使用了 raise 15 觸發(fā)了一個軟中斷，因此進入中斷 15 的服務(wù)程序，即 _real_start 。

在使用 u-boot 引導(dǎo)的時候，由于同樣的原因， u-boot 的主循環(huán)一直是在中斷 15 的服務(wù)程序中的，引導(dǎo)內(nèi)核時同樣處于這種狀態(tài)，此時 rti 退出的將是 u-boot 的那個中斷服務(wù)。

1 參考資料

head.s 分析 (1) ：保存 u-boot 傳遞過來的指針 (2009-1-19)

head.s 分析 (2) ： SYSCFG 配置 (2009-1-19)

head.s 分析 (3) ：數(shù)據(jù)及指針寄存器清 0 (2009-1-19)

head.s 分析 (4) ：關(guān)閉 CACHE (2009-01-19)

head.s 分析 (5) ：關(guān)閉串口 (2009-01-19)

head.s 分析 (6) ：棧指針初始化 (2009-01-19)

head.s 分析 (7) ： init_early_exception_vectors (2009-1-19)

head.s 分析 (8) ：配置 PLL 及 SDRAM (2009-01-20)

head.s 分析 (9) ： EBIU 配置 (2009-01-20)

head.s分析(10)：轉(zhuǎn)入中斷15